The Jack Baskin School of Engineering at the University of California, Santa Cruz is licensed for Level 1 of the Cadence University Software Bundles. This licensing is generously provided by Cadence Design Systems University Program at substantial educational discount. University licensing provides Baskin School of Engineering faculty and students access to the Cadence Design Software products listed below. Note that this page only contains information about Cadence products only; please refer to the appropriate software support page for information about other vendors' software.
The School currently supports the use of Cadence Software products on the Red Hat Linux and Microsoft Windows operating systems. Use of other operating systems is not supported nor recommended.
DO NOT contact Cadence Design Systems directly - all questions and requests must be submitted via the official site technical liaisons. Cadence Design Systems provides the software at a generous discount provided the site technical liaisons handle all questions and requests.
Should you have any questions related to the use of Cadence Design Systems Software, please send them to email@example.com. Please note in the subject line that your request is related to Cadence software.
|E-Mail Questions and Problems:||firstname.lastname@example.org|
|Primary Technical Liaison:||Eric Shell|
|Secondary Technical Liaison:||Jose Renau|
|University Licensing Professor:||Jose Renau|
Course and Research Lab Use
Cadence software is used by the Baskin School of Engineering in a number of labs and classes. Should you wish to learn about practical usage of Cadence products, please contact the faculty, researchers and students in these courses and labs. This web page describes only how Cadence products are utilized at the Baskin School of Engineering and does not provide detailed instructions on how to use the tools themselves.
Cadence software products are often used in the following classes. This is a partial listing, as courses in the School of Engineering are constantly updated. Recommended courses for an introduction to some of the Cadence products include Computer Engineering 174 and Computer Engineering 222.
- Electrical Engineering 070/L - Introduction to Electronic Circuits
- Electrical Engineering 115- Introduction to Micro-Electro-Mechanical-Systems (MEMS) Design
- Electrical Engineering 123A- Senior Thesis - Electrical Engineering Design I
- Electrical Engineering 123B - Senior Thesis - Electrical Engineering Design I
- Electrical Engineering 171/L - Analog Electronics
- Computer Engineering 121/L - Microprocessor System Design
- Computer Engineering 123A - Senior Thesis / Computer Engineering Design I
- Computer Engineering 123B - Senior Thesis / Computer Engineering Design II
- Computer Engineering 170 - Circuits, Devices and Systems
- Computer Engineering 174 - Introduction to EDA Tools
- Electrical Engineering 211 - Introduction to Nanotechnology
- Electrical Engineering 215 - Micro-Electro-Mechanical Systems (MEMS) Design
- Electrical Engineering 221 - Advanced Analog Integrated Circuits
- Computer Engineering 221 - Advanced Microprocessor Design
- Computer Engineering 222 - VLSI Digital System Design
- Computer Engineering 223 - VLSI System On a Chip design
- Computer Engineering 226 - Computer-Aided Analysis of Electrical Circuits
- Computer Engineering 227 - Advances in Computer-Aided Synthesis of VLSI Circuits
Cadence products are used in the following School of Engineering faculty research labs:
- Biometric Microelectronic Systems Engineering Research Center (BMES ERC)
- Advanced Integrated Electronics Research Group
- Computer Aided Design Lab
- Kestrel Parallel Processor
- Nanoelectronic Circuits and Systems Lab
- Micro-Architecture Santa Cruz
SPB/OrCAD Self-Serve Installation
Users can install OrCAD themselves using the following instructions. These steps assume you have administrator rights on your system. If you do not have local administrator rights you will not be able to install OrCAD. If you are on a supported BSOE computer and do not have administrator rights, you should request help with the installation through the IT Request ticketing system.
- In a web browser, connect to https://software.soe.ucsc.edu/bsoe/cadence and log in with your CruzID Blue credentials
- If you are not able to access that location but you are enrolled in a BSOE course or are otherwise affiliated with BSOE, please e-mail email@example.com for assistance.
- You will see a set of files including an installation.txt file with installation instructions; please refer to that file for installation steps
- When installation has completed you can freely delete the installation files that you downloaded
Please note that if you are not on the BSOE network, either because you are off campus or in another part of campus, you will also need to connect to the UCSC VPN service before you will be able to check out a license and run Cadence software.
Specific Product Licensing
The School of Engineering is licensed for the following Cadence Design Systems Products.
|Custom IC Bundle Software|
|Digital Integrated Circuits Bundle|
|Place & Route and Timing
Virtuoso® -XL layout editor
Cadence® chip assembly router
Silicon Ensemble TM PKS optimization
Dracula® physical verification and extractor suite
Design for Manufacturing
Fire & Ice QXC (gate)
VoltageStorm (gate and transistor)
CeltIC NDC crosstalk analyzer with delay calculator
PacifIC static noise analyzer for custom digital ICs
SignalStorm NDC nanometer delay calculator
SignalStorm library characterizer
Silicon Virtual Prototyping
Cadence® SOC Encounter Global Physical Synthesis (GPS)
Route accelerator multi-threaded route option
Encounter® test architect XL
Encounter® true time test GXL
Encounter® diagnostics GXL
Cadence® NC-Verilog R simulator
Cadence® NC-VHDL simulator
Cadence® NC-Sim mixed language simulator
Cadence® simulation analysis environment
Incisive TM unified simulator
AMS option to Incisive
FormalCheck® model checker
Verification Process Automation
Incisive™ enterprise manager
Incisive™ enterprise eAnalyzer
Encounter™ Conformal GXL
Encounter™ RTL Compiler Ultra
Pre-verified, Re-usable Verification IP Components
AMBA AHB protocol
PCI Express End Point protocol
PCI Express Root Complex protocol
PCI 2.2/2.3 protocol
PCI-X 1.0/2.0 protocol
AMBA AXI protocol
|PCB Design and Layout
Allegro® PCB librarian 610
Allegro® PCB design HDL 610
Allegro® PCB design CIS 610
PCB High-Speed Analysis
Allegro® PCB SI 610
Allegro® Package Designer 620
Allegro® Package SI 620
Allegro® PCB design HDL 220
Allegro® PCB design CIS 220
Allegro® AMS simulator 210
Information is provided 'as is' without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to interoperability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does under your conditions. Keep your master intact until you are satisfied with the use of this information within your environment.
Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134. This page is not an advertisement for Cadence products.
Page last updated 6/11/18.